60-GHz CMOS Phase-Locked Loops by Hammad M. Cheema, Reza Mahmoudi, Arthur H.M. van Roermund

By Hammad M. Cheema, Reza Mahmoudi, Arthur H.M. van Roermund

The promising excessive information price instant purposes at millimeter wave frequencies normally and 60 GHz specifically have won a lot realization in recent times. although, demanding situations on the topic of circuit, structure and measurements in the course of mm-wave CMOS IC layout need to be triumph over prior to they could develop into potential for mass market.

60-GHz CMOS Phase-Locked Loops concentrating on phase-locked loops for 60 GHz instant transceivers elaborates those demanding situations and proposes ideas for them. The method point layout to circuit point implementation of the whole PLL, besides separate implementations of person elements equivalent to voltage managed oscillators, injection locked frequency dividers and their combos, are incorporated. moreover, to meet a few transceiver topologies concurrently, flexibility is brought within the PLL structure by utilizing new dual-mode ILFDs and switchable VCOs, whereas reusing the low frequency elements on the related time.

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In case of coaxial cables, impedance and insertion loss varies with different cable routing. Furthermore, bending and stretching cables changes their dimensions, and thus affects signal propagation. This is particularly critical when measuring phase sensitive circuits (I-Q VCOs, phase shifters etc) where matching is of utmost importance. To address the above mentioned source of inaccuracies, semi-rigid cables and solid waveguides are employed in this work to minimize connection variations during measurements and enable accurate measurements.

Furthermore, cross-talk between RF interconnects in close proximity deteriorates the spectral purity of signals and requires isolation and shielding from each other. Variation in ground potential in different parts of the integrated circuit generates erroneous voltage levels and innovative grounding techniques are required to achieve a common reference voltage all over the chip. As will be discussed, the solutions to these problems are sometimes contradictory and the designer has to identify the most dominant one based on circuit application and frequency and find the best compromise.

An alternative of the above setup is designing an on-chip mixer and downconvert the oscillator frequency to within the range of the spectrum analyzer and thereby extract its performance indirectly. In such a scenario, the mixer needs to be characterized separately so that its affect on a VCO measurement can be subtracted. Extra chip area and design time are two major drawbacks of this approach. G Probe V-Band harmonic mixer G S Oscillator under test Fig. 12 Indirect measurement of a V-band oscillator Spectrum Analyzer 50 l 3 Layout and Measurements at mm-Wave Frequencies Another important component for on-wafer measurements are high frequency probes.

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60-GHz CMOS Phase-Locked Loops by Hammad M. Cheema, Reza Mahmoudi, Arthur H.M. van Roermund
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